1. Field of the Invention
The present invention relates to an EL (electro-luminescence) display formed by incorporating an EL element on a substrate. More particularly, the invention relates to an EL display (electric device) using a semiconductor element (an element using a semiconductor thin film). Furthermore, the present invention relates to an electronic apparatus (EL display device) in which the EL display is used in a display portion thereof.
2. Description of the Related Art
In recent years, technology for forming a thin film transistor (hereinafter, TFT) on a substrate has been largely improved, and an application development of the TFT to an active matrix display device has been carried out. In particular, the TFT using a polysilicon film has a higher electric field effect mobility than the TFT using a conventional amorphous silicon film, and therefore, the former TFT may be operated at a high speed. Thus, the pixel control which has been conducted at a driver circuit outside of the substrate may be conducted at the driver circuit which is formed on the same substrate as the pixel.
Such an active matrix display device can, by incorporating various circuits and elements on the same substrate, obtain various advantages such as decrease in manufacturing costs, decrease in sizes of the display devices, increase in its yields, and decrease in its throughputs.
Further, research on the active matrix EL display device having an EL element as a self-light-emitting device (hereinafter referred to as EL display) is becoming more and more active. The EL display is referred to as an organic EL display (OELD) or an organic light-emitting diode (OLED).
The EL display is a self-light-emitting type unlike a liquid crystal display device. The EL element is constituted in such a manner that an EL layer is sandwiched between a pair of electrodes. However, the EL layer normally has a lamination structure. Typically, the lamination structure of a “hole transport layer/a light emitting/an electron transport layer” proposed by Tang et al. of the Eastman Kodak Company can be cited. This structure has a very high light-emitting efficiency, and this structure is adopted in almost all the EL displays which are currently subjected to research and development.
In addition, it may have a structure such that on the pixel electrode, a hole injection layer/a hole transport layer/a light emitting/an electron transport layer, or a hole injection layer/a hole transport layer/a light emitting/an electron transport layer/an electron injection layer may be laminated in the stated order. Phosphorescent dye or the like may be doped into the light emitting.
In this specification, all of the layers provided between the pixel electrode and an opposite electrode are generally referred to as EL layers. Consequently, the hole injection layer, the hole transport layer, the light emitting, the electron transport layer, the electron injection layer and the like are all included in the EL layers.
A predetermined voltage is applied from a pair of electrodes to the EL layer of the above structure, with the result that recombination of carriers occurs in the light emitting layer to emit light. Note that in the present specification, emitting light by an EL element is referred to as driving the EL element. Besides, in the present specification, a light emitting element formed of an anode, an EL layer, and a cathode, is referred to as an EL element. Besides, a potential difference generated between an anode and a cathode of an EL element is referred to as an EL driver voltage.
FIG. 23 is a block diagram of a conventional multi gradation system EL display. The EL display shown in FIG. 23 uses TFTs formed on a substrate and includes a pixel portion 101, and a source signal side driver circuit 102 and a gate signal side driver circuit 103 which are disposed at the periphery of the pixel portion. An external switch 116 for controlling an EL driver voltage is connected to the pixel portion 101.
The source signal side driver circuit 102 fundamentally contains a shift register 102a, a latch (A) 102b. and a latch (B) 102c. Further, clock signals CK and start pulses SP are input to the shift register 102a. digital data signals are input to the latch (A) 102b, and latch signals are input to the latch (B) 102c. 
The digital data signal input to the pixel portion 101 is formed by a time-division gradation data signal generation circuit 114. A video signal consisting of an analog signal or digital signal (a signal containing image information) is converted into a digital data signal for performing time-division gradation in the time-division gradation data signal generation circuit 114. At the same time, timing pulses necessary for performing time-division gradation display are generated in this circuit.
Specifically, the time-division gradation data signal generation circuit 114 contains means for: dividing one frame period into a plurality of subframe periods corresponding to n-bit (where n is an integer equal to or greater than 2) gradations; selecting write-in periods and display periods in the plurality of subframe periods; and setting the length of the display periods.
As the structure of the pixel portion 101, what is shown in FIG. 18 has been general. In FIG. 18, gate signal lines (G1 to Gn) for inputting gate signals and source signal lines (also referred to as data signal lines) (S1 to Sn) for inputting digital data signals are provided in the pixel portion 101. Note that the digital data signal means a digital video signal.
Besides, power source supply lines (V1 to Vn) are provided in parallel with the source signal lines (S1 to Sn). The potential of the power source supply line (V1 to Vn) is referred to as a power source potential. Besides, wiring lines (Vb1 to Vbn) are provided in parallel with the gate lines (G1 to Gn). The wiring lines (Vb1 to Vbn) are connected to the external switch 116.
A plurality of pixels 104 are arranged in matrix form in the pixel portion 101. FIG. 19 is an enlarged view of the pixel 104. In FIG. 19, reference numeral 1701 designates a TFT (hereinafter referred to as a switching TFT) functioning as a switching element; 1702, a TFT (hereinafter referred to as an EL driving TFT) functioning as an element (current control element) for controlling a current supplied to an EL element 1703; and 1704, a capacitor (holding capacitance).
A gate electrode of the switching TFT 1701 is connected to a gate signal line 1705 of one of the gate signal lines (G1 to Gn) for inputting gate signals. One of a source region and a drain region of the switching TFT 1701 is connected to a source signal line 1706 of one of the source signal lines (S1 to Sn) for inputting digital data signals, and the other is connected to a gate electrode of the EL driving TFT 1702 and the capacitor 1704, respectively.
One of a source region and a drain region of the driving TFT 1702 is connected to a power source supply line 1707 of one of the power source supply lines (V1 to Vn), and the other is connected to the EL element 1703. The capacitor 1704 is connected to the power source supply line 1707 of one of the power source supply lines (V1 to Vn).
The EL element 1703 is formed of an anode, a cathode, and an EL layer provided between the anode and the cathode. In the case where the anode is connected to the source region or the drain region of the EL driving TFT 1702, in other words, in the case where the anode is a pixel electrode, the cathode becomes an opposite electrode. On the contrary, in the case where the cathode is connected to the source region or the drain region of the EL driving TFT 1702, in other words, in the case where the cathode is a pixel electrode, the anode becomes an opposite electrode. In the present specification, the potential of the opposite electrode is referred to as an opposite potential. A potential difference between the potential of the opposite electrode and the potential of the pixel electrode is referred to as an EL driver voltage, and this EL driver voltage is applied to the EL layer.
The opposite electrode of the EL element is connected to the external switch 116 through one of the wiring lines (Vb1 to Vbn) (FIG. 18).
Next, driving of a multi-gradation system EL display will be described. Here, 2n gradation display by an n-bit digital driving system will be described.
FIG. 5 shows a timing chart in digital system time-division gradation display of the multi-gradation system EL display. First, one frame period is divided into n subframe periods (SF1 to SFn). Note that a period in which all pixels of the pixel portion display one picture image is referred to as one frame period (F). A period obtained by dividing one frame period is referred to as a subframe period. As the number of gradations becomes large, the number of divisions of one frame period also becomes large, and a driver circuit must be driven by a high frequency.
One subframe period is divided into a write-in period (Ta) and a display period (Ts). The write-in period is a period in which digital data signals are inputted to all pixels in one subframe period. The display period (also referred to as a lighting period) is a period in which an emission or non-emission state of the EL element is selected and a display is performed.
Besides, an EL driver voltage shown in FIG. 5 indicates an EL driver voltage of an EL element in which the emission state is selected. That is, the EL driver voltage (FIG. 5) of the EL element in which the emission state is selected becomes 0 V during the write-in period, and has such magnitude, during the display period, that the EL element emits light.
An opposite potential is controlled by the external switch 116. In the write-in period, the opposite potential is kept equal to the power source potential, and in the display period, there is generated such a potential difference (ground in FIG. 18) that the EL element emits light, between the opposite potential and the power source potential.
First, the write-in period and the display period of each subframe will be described using the symbols of FIGS. 18 and 19, and thereafter, the time-division gradation display will be described.
First, a gate signal is inputted to the gate signal line G1, and all switching TFTs 1701 connected to the gate signal line G1 are turned on. A digital data signal is sequentially inputted to the source signal line (S1 to Sn). The opposite potential is kept equal to the power source potential of the power source supply line (V1 to Vn). The digital data signal includes information of “0” or “1”. The digital data signal of “0” or “1” means a signal having a voltage of Hi or Lo, respectively.
The digital data signal inputted to the source signal line (S1 to Sn) is inputted to the gate electrode of the EL driving TFT 1702 through the switching TFT 1701 which is in an ON state. The digital data signal is also inputted to the capacitor 1704 and is held.
Gate signals are sequentially inputted to the gate signal lines G2 to Gn, so that the foregoing operation is repeated, the digital data signals are inputted to all pixels, and the inputted digital data signals are held in the respective pixels. A period in which digital data signals are inputted to all pixels, is referred to as the write-in period.
When the digital data signals are inputted to all pixels, all switching TFTs 1701 are turned off. By the external switch connected to the opposite electrode, such a potential difference that the EL element emits light is generated between the opposite potential and the power source potential.
In the case where the digital data signal includes the information of “0”, the EL driving TFT 1702 is turned off, and the EL element 1703 does not emit light. On the contrary, in the case where the digital data signal includes the information of “1”, the EL driving TFT 1702 is turned on. As a result, the pixel electrode of the EL element 1703 is held the power source potential, and the EL element 1703 emits light. Like this, according to the information which the digital data signal includes, the emission or non-emission state of the EL element is selected, and every pixel performs a display at the same time, so that a picture image is formed. A period in which a pixel performs a display is referred to as the display period.
The lengths of write-in periods (Ta1 to Tan) of the n subframe periods (SF1 to SFn), respectively, are all constant. The display periods (Ts) of each of the subframe periods (SF1 to SFn) become display periods (Ts1 to Tsn).
The length of the display periods is set so as to become Ts1: Ts2: Ts3: . . . : Ts(n−1): Tsn=20: 2−1: 2−2: . . . : 2−(n−2): 2−(n−1). Note that SF1 to SFn may appear in any order. A desired gradation display, from among the 2n gradations, can be performed by combining the display periods.
The display period is any period from Ts1 to Tsn. Predetermined pixels are turned on for the Tsn period here.
The write-in period again begins, and after the data signal is input to all of the pixels, the display period begins. Any of the periods Ts1 to Ts(n−1) becomes the display period at this point. Predetermined pixels are turned on during the Ts(n−1) period here.
Similar operations are repeated in the remaining (n−2) subframe periods, Ts(n−2), Ts(n−3), . . . , and Ts1 are set, in order, to be the display period, and predetermined pixels are turned on in the respective subframe periods.
One frame period is complete after the appearance of the n subframe periods. By adding up the lengths of the display periods in which the pixel is turned on, the gradation of that pixel is determined. For example, when n=8, and the brightness for a case of the pixel emitting light during all of the display periods is taken as 100%, when the pixel emits light in Ts1 and Ts2, then a brightness of 75% can be expressed, and when Ts3, Ts5, and Ts8 are selected, a brightness of 16% can be expressed.
With respect to the foregoing multi-gradation system EL display device, in the case where the size of the EL display device is made large, the number of pixels is increased, and a large current flows through the EL display device. Since this current flows through the external switch for controlling the EL driver voltage, high current power is required for the external switch for controlling the EL driver voltage.
In the EL display device, in the case where a light emission amount of 200 cd/m2 is obtained, a current of several mA/cm2 is required. For example, in the case where an EL material of 5 mA/cm2 is used and a display device of 40 inches is formed, a current value necessary for a display becomes about 25 A, which is a considerable value.
In general, a predetermined standard of current power is determined for an external switch, and the upper limit of this current power has prevented enlargement of the multi-gradation system EL display device.
Besides, in the foregoing multi-gradation system EL display device, as the number of gradations becomes large, the number of divisions of one frame period is also increased, and a driver circuit must be driven by a high frequency. On the other hand, there is a tendency in that an external switch frequency characteristic is deteriorated as the current power becomes high. As a result, there has been a problem in that as the size of the multi-gradation system EL display device is enlarged, the frequency characteristic is deteriorated, and the number of possible gradations is decreased.